The Poppy project! Currently for intrepid souls only.
Poppy is a hatchling computer environment based on a home-made CPU.
Read a PDF about my Sonne-16 instruction set architecture.
Then download the lot:
- A simulation software called Hen
- Firmware ("8T3") for it, with self-assembling assembler and pattern matcher Rey
- Paverho, a reference microarchitecture for Sonne-16 written in Verilog HDL
Hopefully the silly names made you reconsider... but just in case you are
planning to download:
The simulator is written in C and should be quite portable.
use it to play-around with and re-assemble the firmware, which is
The Verilog design files are for the Terasic DE1-SoC board. It's one of my
first Verilog projects, but it does include drivers for VGA and PS/2 keyboard
to go with Paverho.
But – and this is a big but – the only
console output from the hardware system apart from a skimpy splash bitmap
is basically from the matcher, telling you that it has or hasn't matched your
input command. Of which there is only 1 at the moment, called test.
Yet, there is more to come: For the next release, I am working on a Forth
interpreter and SD card storage for Paverho, in order to use the FPGA board
as the primary development system.
June 12 patch, overwrites corresponding files in the distribution.
Preliminary snapshot of a Forth system.
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